27.10.12 Counter Value, 16-bit Mode
Name: | COUNT |
Offset: | 0x10 |
Reset: | 0x00 |
Property: | PAC Write-Protection, Write-Synchronized |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
COUNT[15:8] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
COUNT[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 15:0 – COUNT[15:0] Counter Value
Note: Prior to any
read access, this register must be synchronized by the user by writing
CTRLA.COUNTSYNC = 1.