5.1.1 Clock Selection
AVR and PIC32CM MCUs offer flexible and robust clock systems that support multiple internal and external clock sources, programmable prescalers, and safe run-time switching. Both MCUs allow peripherals to request and receive clocks as needed, support low-frequency and high-frequency oscillators, and provide mechanisms for clock accuracy tuning and failure detection. The main clock can be prescaled, and peripherals can operate either synchronously or asynchronously with respect to the main clock. These features enable efficient power management, high performance, and reliable operation across a wide range of applications.
The main difference between AVR and PIC32CM is in how clock management is integrated within the MCU. AVR uses a Clock Controller (CLKCTRL), while PIC32CM MCUs (depending on the device family) implement a Clock System that uses a combination of the Generic Clock Controller (GCLK), Main Clock Controller (MCLK), System Controller (SYSCTRL), Oscillator Controllers (OSCCTRL, OSC32KCTRL), and Power Manager (PM). Table 5-3 shows a comparison of features between AVR and PIC32CM.
| Feature | AVR® CLKCTRL (Clock Control) | PIC32CM Clock System (GCLK, MCLK, SYSCTRL, OSCCTRLs, PM) |
|---|---|---|
| Main Clock Source |
Selectable internal/external Up to 24 MHz OSCHF, 48 MHz PLL |
Selectable via GCLK Up to 48 MHz OSC48M, 96 MHz FDPLL |
| Internal Oscillators |
OSCHF (up to 24 MHz) OSC32K (32.768 kHz) |
OSC8M (8 MHz) OSC48M (48 MHz) OSC32K, OSCULP32K (32.768 kHz) |
| External Oscillators |
32.768 kHz crystal External clock |
0.4–32 MHz XOSC 32.768 kHz XOSC32K External clock |
| PLL/DFLL/DPLL | 48 MHz PLL (2x/3x multiplier) |
DFLL48M (48 MHz) FDPLL96M (48–96 MHz) |
| Clock Distribution | Automatic peripheral clock request system | Generic Clock Controller (GCLK) |
| Prescaler Range | 1x to 64x | 1x to 128x (GCLK, MCLK) |
| Clock Domains |
Main clock Some async peripherals |
CPU AHB, multiple APBx(1) Per-peripheral domains |
| Safe Run-Time Switching | Supported | Supported (GCLK, MCLK) |
| Clock Gating/Masking | Automatic by peripheral request | Module-level clock gating via masks |
| Clock Failure Detection | Limited | Safe clock switch and event output |
| Calibration/Auto-Tuning | Auto-tuning for internal oscillators |
Factory calibration Fine tuning |
| Power Management Integration | Peripheral ON/OFF in Standby mode |
Power domain gating Wake-up on clock events |
| Brown-out Detector | Limited |
BOD33 integrated Can trigger wake-up |
- AHB and APB refer to the Advanced High-performance Bus (AHB) and the Advanced Peripheral Bus (APB), which are two types of internal bus architectures in Arm-based microcontrollers used to connect the CPU, memory, and peripherals.