18.9 Register Summary - Peripheral Pin Select Module


Offset	Name	Bit Pos.	5	2	0
0x00 ... 0x1D8B	Reserved
0x1D8C	RA0PPS	7:0	RA0PPS[5:0]
0x1D8D	RA1PPS	7:0	RA1PPS[5:0]
0x1D8E	RA2PPS	7:0	RA2PPS[5:0]
0x1D8F	Reserved
0x1D90	RA4PPS	7:0	RA4PPS[5:0]
0x1D91	RA5PPS	7:0	RA5PPS[5:0]
0x1D92 ... 0x1D9B	Reserved
0x1D9C	RC0PPS	7:0	RC0PPS[5:0]
0x1D9D	RC1PPS	7:0	RC1PPS[5:0]
0x1D9E	RC2PPS	7:0	RC2PPS[5:0]
0x1D9F	RC3PPS	7:0	RC3PPS[5:0]
0x1DA0	RC4PPS	7:0	RC4PPS[5:0]
0x1DA1	RC5PPS	7:0	RC5PPS[5:0]
0x1DA2 ... 0x1E0B	Reserved
0x1E0C	PPSLOCK	7:0			PPSLOCKED
0x1E0D	INTPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E0E	T0CKIPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E0F	T1CKIPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E10	T1GPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E11	T3CKIPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E12	T3GPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E13 ... 0x1E18	Reserved
0x1E19	T2INPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E1A	T4INPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E1B	T6INPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E1C ... 0x1E1D	Reserved
0x1E1E	CCP1PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E1F	CCP2PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E20 ... 0x1E3C	Reserved
0x1E3D	CLCIN0PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E3E	CLCIN1PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E3F	CLCIN2PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E40	CLCIN3PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E41	RX1PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E42	CK1PPS	7:0	PORT[2:0]	PIN[2:0]
0x1E43 ... 0x1E46	Reserved
0x1E47	SSP1CLKPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E48	SSP1DATPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E49	SSP1SSPPS	7:0	PORT[2:0]	PIN[2:0]
0x1E4A ... 0x1E4F	Reserved
0x1E50	ADACTPPS	7:0	PORT[2:0]	PIN[2:0]