23.5.1 CCPxCON

CCP Control Register

Note:

The set and clear operations of the Compare mode are reset by setting MODE = ‘b0000 or EN = 0.
When MODE = ‘b0001 or ‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.

Name:	CCPxCON
Offset:	0x038E,0x0392


Bit	7	6	5	4	3	2	1	0
	EN		OUT	FMT	MODE[3:0]
Access	R/W		R	R/W	R/W	R/W	R/W	R/W
Reset	0		x	0	0	0	0	0

Bit 7 – EN CCP Module Enable

Value	Description
1	CCP is enabled
0	CCP is disabled

Bit 5 – OUT CCP Output Data (read-only)

Bit 4 – FMT CCPxRH:L Value Alignment (PWM mode)

Value	Name	Description
x	Capture mode	Not used
x	Compare mode	Not used
1	PWM mode	Left aligned format
0	PWM mode	Right aligned format

Bits 3:0 – MODE[3:0] CCP Mode Select

Table 23-5. CCPx Mode Select
MODE Value	Operating Mode	Operation	Set CCPxIF
`11xx`	PWM	PWM operation	Yes
`1011`	Compare	Pulse output; clear TMR1⁽²⁾	Yes
`1010`		Pulse output	Yes
`1001`		Clear output⁽¹⁾	Yes
`1000`		Set output⁽¹⁾	Yes
`0111`	Capture	Every 16^th rising edge of CCPx input	Yes
`0110`		Every 4^th rising edge of CCPx input	Yes
`0101`		Every rising edge of CCPx input	Yes
`0100`		Every falling edge of CCPx input	Yes
`0011`		Every edge of CCPx input	Yes
`0010`	Compare	Toggle output	Yes
`0001`	Compare	Toggle output; clear TMR1⁽²⁾	Yes
`0000`	Disabled		—

The set and clear operations of the Compare mode are reset by setting MODE = ‘b0000 or EN = 0.When MODE = ‘b0001 or ‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.