40.3.1 Supply Voltage

Table 40-1. 
Standard Operating Conditions (unless otherwise stated)
Param. No.Sym.CharacteristicMin.Typ.†Max.UnitsConditions
Supply Voltage
D002VDD1.8—5.5VFOSC ≤ 16 MHz
2.5—5.5VFOSC > 16 MHz
RAM Data Retention(1)
D003VDR1.7——VDevice in Sleep mode
Power-on Reset Release Voltage(2)
D004VPOR—1.6—VBOR disabled(3)
Power-on Reset Rearm Voltage(2)
D005VPORR—1—VBOR disabled(3)
VDD Rise Rate to ensure internal Power-on Reset signal(2)
D006SVDD0.05——V/msBOR disabled(3)

† Data in “Typ.” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

Note:
  1. This is the limit to which VDD can be lowered in Sleep mode without losing RAM data.
  2. Refer to the “POR and POR Rearm with Slow Rising VDD” figure below.
  3. Refer to the “Reset, WDT, Power-up Timer, and Brown-Out Reset Specifications” section for BOR trip point information.
Figure 40-2. POR and POR Rearm with Slow Rising VDD
Note:
  1. When NPOR is low, the device is held in Reset.