In this application, Timer2 and CLC are used to create a hardware based code-free switch
debouncer (Figure 4-1). The buttons in the hardware are used to control the flow of the
application as described in Setup, Main Loop and Idle Subroutine.
Timer2 automates the debouncing process using its monostable mode of operation. In this
mode, the first switch activation is used to start the timer counting, ignoring any
subsequent bouncing. Once the timer count reaches a predetermined value, the timer
peripheral will produce a signaling event that can be used to indicate a valid switch
activation has been detected. See TMR2/4 Setup for details on how to set up Timer2.Figure 4-1. Switch Electrical State vs.
Timer2 Output State
The TMR2 output signal is used in conjunction with CLC to detect key presses and
releases. The CLC operates as a toggle flip-flop in JK Flip-Flop with R mode of
operation (Figure 4-2) where the TMR2 output acts as the clock input. Every output pulse
from TMR2 toggles the output of the JK Flip-Flop from LOW-to-HIGH when the switch is
pressed and from HIGH-to-LOW when the switch is released, as per the Start/Reset option
configured earlier. See CLC1/2 Setup for details on how to set up CLC.Figure 4-2. Toggle Flip-Flop Using JK
Flip-Flop
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