3.2 Program/Verify Commands
Once a device has entered ICSP Program/Verify mode (using either high-voltage or LVP entry), the programming host device may issue commands to the microcontroller, each eight bits in length. The commands are summarized in Table 3-1 and are used to erase or program the device based on the location of the Program Counter (PC).
Some 8-bit commands also have an associated data payload (such as Load PC Address and Read Data from NVM).
If the host device issues an 8-bit command byte that has an associated data payload, the host device is responsible for sending an additional 24 clock pulses (e.g., three 8-bit bytes) to send or receive the payload data associated with the command.
The payload field size is compatible with many 8-bit SPI-based systems. Within each 24-bit payload field, the first bit transmitted is always a Start bit, followed by a variable number of Pad bits, followed by the useful data payload bits and ending with one Stop bit. The useful data payload bits are always transmitted MSb first.
When the programming device issues a command that involves a host to the microcontroller payload (e.g., Load PC Address), the Start, Stop and Pad bits must all be driven by the programmer, as defined by the data column in Table 3-1. When the programming host device issues a command that involves the microcontroller to host payload data (e.g., Read Data from NVM), the Start, Stop and Pad bits must be treated as ‘don't care’ bits and the values may be ignored by the host.
When the programming host device issues an 8-bit command byte to the microcontroller, the host must wait a specified minimum amount of delay (which is command-specific) prior to sending any additional clock pulses (associated with either a 24-bit data payload field or the next command byte).
Command Name | Command Value | Payload Expected | Delay after Command | Data/Note | |
---|---|---|---|---|---|
Binary (MSb … LSb) | Hex | ||||
Load PC Address | 1000 0000 | 80 | Yes | TDLY | Payload Value = PC |
Bulk Erase Program Memory | 0001 1000 | 18 | No | TERAB | The PC is used to identify the regions that need to be bulk erased. |
Row Erase Program Memory | 1111 0000 | F0 | No | TERAS | The row addressed by the MSbs of the PC is erased; LSbs are ignored. |
Load Data for NVM | 0000 00J0 | 00/02 | Yes – Data In | TDLY | Data is loaded to the data latch addressed by the LSbs
of the PC; MSbs are ignored.
J = PC is unchanged
J = PC = PC + |
Read Data from NVM | 1111 11J0 | FC/FE | Yes – Data Out | TDLY | Data output ‘0 ’ if
code-protect is enabled.
J = PC is unchanged
J = PC = PC + |
Increment Address | 1111 1000 | F8 | No | TDLY | PC = PC + 1 |
Begin Internally Timed Programming | 1110 0000 | E0 | No | TPINT | Commits latched data to NVM (self-timed). |
Begin Externally Timed Programming | 1100 0000 | C0 | No | TPEXT | Commits latched data to NVM (externally timed). After PTEXT, the End Externally Timed Programming command must be used. |
End Externally Timed Programming | 1000 0010 | 82 | No | TDIS | Must be issued within required time delay (TPEXT) after the Begin Externally Timed Programming command. |