3.1.1.2 VDD-First Entry Mode

To enter the Program/Verify mode via the VDD-First Entry mode, the following sequence must be followed:

  1. Hold ICSPCLK and ICSPDAT low.
  2. Raise the voltage on VDD from 0V to the desired operating voltage.
  3. Raise the voltage on MCLR from VDD or below to VIHH.

The VDD-First Entry mode is useful for programming the device when the VDD is already applied. It is not necessary to disconnect VDD to enter the Program/Verify mode. See the timing diagram in Figure 3-2.

Figure 3-2. Programming Entry and Exit Modes – VDD-First and Last