25.10.6 TxRST
Name: | TxRST |
Offset: | 0x0391,0x0397 |
Timer External Reset
Signal Selection Register
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | RSEL[4:0] | |
Access | | | | R/W | R/W | R/W | R/W | R/W | |
Reset | | | | 0 | 0 | 0 | 0 | 0 | |
Bits 4:0 – RSEL[4:0] External Reset Source
Selection
Table 25-4. External Reset
SourcesValue | Description |
---|
TMR2 Reset
Source | TMR4 Reset
Source |
---|
10000 | CLC4_OUT |
01111 | CLC3_OUT |
01110 | CLC2_OUT |
01101 | CLC1_OUT |
01100 | ZCD_OUT |
01011 | C2_OUT |
01010 | C1_OUT |
01001 | PWM2S1P2_OUT |
01000 | PWM2S1P1_OUT |
00111 | PWM1S1P2_OUT |
00110 | PWM1S1P1_OUT |
00101 | CCP2_OUT |
00100 | CCP1_OUT |
00011 | Reserved |
00010 | TMR4_Postscaled_OUT | Reserved |
00001 | Reserved | TMR2_Postscaled_OUT |
00000 | Pin selected
by T2INPPS | Pin selected
by T4INPPS |