13.3.2.1.1 Power-on Reset (POR)
The Power-on Reset (POR) aims to ensure a safe start-up of logic and memories, a process generated by an on-chip detection circuit that is always enabled. The POR is activated when the VDD rises and sets an active Reset as long as the VDD is below the POR threshold voltage (VPOR). The Reset will continue until the Start-up and Reset initialization sequence is completed. Fuses determine the Start-Up Time (SUT). Reset is activated again, without delay, when VDD falls below the detection level (VPORR).