35.5.7 Op Amp n Resistor Ladder Multiplexer
Name: | OPnRESMUX |
Offset: | 0x12 + n*0x08 [n=0..2] |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
MUXWIP[2:0] | MUXBOT[2:0] | MUXTOP[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:5 – MUXWIP[2:0] Multiplexer for Wiper
Value | Name | Description |
---|---|---|
0x0 | WIP0 | R1 = 15R, R2 = 1R |
0x1 | WIP1 | R1 = 14R, R2 = 2R |
0x2 | WIP2 | R1 = 12R, R2 = 4R |
0x3 | WIP3 | R1 = 8R, R2 = 8R |
0x4 | WIP4 | R1 = 6R, R2 = 10R |
0x5 | WIP5 | R1 = 4R, R2 = 12R |
0x6 | WIP6 | R1 = 2R, R2 = 14R |
0x7 | WIP7 | R1 = 1R, R2 = 15R |
Bits 4:2 – MUXBOT[2:0] Multiplexer for Bottom
Note:
- When selecting LINKOUT for OP0, MUXBOT is connected to the output of OP2.
Value | Name | Description |
---|---|---|
0x0 | OFF | Multiplexer off |
0x1 | INP | Positive input pin for OPn |
0x2 | INN | Negative input pin for OPn |
0x3 | DAC | DAC output (DAC and DAC output buffer must be enabled) |
0x4 | LINKOUT | OP[n-1] output(1) |
0x5 | GND | Ground |
Other | - | Reserved |
Bits 1:0 – MUXTOP[1:0] Multiplexer for Top
Value | Name | Description |
---|---|---|
0x0 | OFF | Multiplexer off |
0x1 | OUT | OPn output |
0x2 | VDD | VDD |
Other | - | Reserved |