7.5 I2S Mode Application

The IS2083BM SoC provides one I2S digital audio I/O interface to connect with an external codec or DSP. It provides 8, 16, 44.1, 48, 88.2 and 96 kHz sampling rates for 16- and 24-bit data formats. The I2S settings can be configured by the Config Tool. The I2S pins are as follows:

  • SCLK1: Serial/Bit clock (IS2083BM input/output)
  • RFS1: Receive frame sync (IS2083BM input/output)
  • MCLK: Primary clock (IS2083BM output)
  • DR1: Receive data (IS2083BM input)
  • DT1: Transmit data (IS2083BM output)

The MCLK is the primary clock output provided to an external I2S device to use as its system clock. This signal is optional and is not required if the external I2S device provides its own system clock. This signal is not used with the internal audio codec.

The following figures illustrate the I2S signal connection between the IS2083BM and an external DSP. The Config Tool can be used to configure the IS2083BM as a host or client.

Note: In this context, the terms “host” and “client” refer to the I2S clocks and frame syncs, not to the audio data itself.
Figure 7-7. IS2083BM in I2S Host Mode
Figure 7-8. IS2083BM in I2S Client Mode