13.10.8.7 32 KHz Internal Oscillator (OSC32K) Control

Name: OSC32K
Offset: 0x18
Reset: 0x0000 0080 (Writing action by User required)
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
  CALIB[6:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 
Bit 15141312111098 
    WRTLOCK STARTUP[2:0] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 76543210 
 ONDEMANDRUNSTDBY  EN1KEN32KENABLE  
Access R/WR/WR/WR/WR/W 
Reset 10000 

Bits 22:16 – CALIB[6:0] Oscillator Calibration

These bits control the oscillator calibration. The calibration values must be loaded by the user from the NVM Software Calibration Area.

Bit 12 – WRTLOCK Write Lock

This bit locks the OSC32K register for future writes, effectively freezing the OSC32K configuration.

ValueDescription
0The OSC32K configuration is not locked.
1The OSC32K configuration is locked.

Bits 10:8 – STARTUP[2:0] Oscillator Start-Up Time

These bits select start-up time for the oscillator.

The OSCULP32K oscillator is used as input clock to the start-up counter.

Table 13-35. Start-Up Time for 32KHz Internal Oscillator
STARTUP[2:0] Number of OSC32K clock cyclesApproximate Equivalent Time [ms]
0x030.092
0x140.122
0x260.183
0x3100.305
0x4180.549
0x5341.038
0x6662.014
0x71303.967
Note:
  1. Start-up time is given by STARTUP + three OSC32K cycles.
  2. The given time assumes an XTAL frequency of 32.768 kHz.

Bit 7 – ONDEMAND On Demand Control

This bit controls how the OSC32K behaves when a peripheral clock request is detected. For details, refer to Table 13-32.

Bit 6 – RUNSTDBY Run in Standby

This bit controls how the OSC32K behaves during standby sleep mode. For details, refer to Table 13-32.

Bit 3 – EN1K 1 KHz Output Enable

ValueDescription
0The 1 KHz output is disabled.
1The 1 KHz output is enabled.

Bit 2 – EN32K 32 KHz Output Enable

ValueDescription
0The 32 KHz output is disabled.
1The 32 KHz output is enabled.

Bit 1 – ENABLE Oscillator Enable

ValueDescription
0The oscillator is disabled.
1The oscillator is enabled.