13.15.6.2.1 Initialization
The EIC must be initialized in the following order:
- Enable CLK_EIC_APB.
- If required, configure the NMI by writing the Non-Maskable Interrupt Control register (NMICTRL).
- When the NMI is used or synchronous edge detection or filtering are
required, enable GCLK_EIC or CLK_ULP32K.
GCLK_EIC is used when a frequency higher than 32 KHz is required for filtering; CLK_ULP32K is recommended when power consumption is the priority. For CLK_ULP32K, write a '1' to the Clock Selection bit in the Control A register (CTRLA.CKSEL). Optionally, enable the asynchronous mode.
- Configure the EIC input sense and filtering by writing the Configuration n register (CONFIGn).
- Enable the EIC.
The following bits are enable-protected, meaning that it can only be written when the EIC is disabled (CTRLA.ENABLE = 0):
- Clock Selection bit in Control A register (CTRLA.CKSEL)
The following registers are enable-protected:
Enable-protected bits in the CTRLA register can be written simultaneously while setting CTRLA.ENABLE to '1', but not at the same time as CTRLA.ENABLE is being cleared.
Enable-protection is denoted by the "Enable-Protected" property in the register description.