4.2 32-pin VQFN/32-pin TQFP Pinout and Multiplexing
| Pin | MUXEN=0 | MUXEN = 1 | Supply | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PMUX Values | ||||||||||||||
| Pin Name | 00 | 01 | 02 | 03 | 04 | 05 | 06 | 07 | 08 | |||||
| EIC | REF | ADC | AC | PTC | SERCOM | SERCOM-ALT | TC/TCC | TCC | COM | AC\GCLK | CCL | |||
| 1 | PA00 | EXTINT[0] | — | — | — | — | — | SERCOM1/ PAD[0] | TCC2/WO[0] | — | — | — | — | AVDD |
| 2 | PA01 | EXTINT[1] | — | — | — | — | — | SERCOM1/ SERCOM1/ PAD[1] | TCC2/WO[1] | — | — | — | — | AVDD |
| 3 | PA02 | EXTINT[2] | — | AIN[0] | — | Y[0] | — | — | — | — | — | — | — | AVDD |
| 4 | PA03 | EXTINT[3] |
VREFA | AIN[1] | — | Y[1] | — | — | — | — | — | — | — | AVDD |
| 5 | PA04 | EXTINT[4] | — | AIN[4] | AIN[0] | Y[2] | — | SERCOM0/ PAD[0] | TCC0/WO[0] | — | — | — | CCL0/ IN[0] | AVDD |
| 6 | PA05 | EXTINT[5] | — | AIN[5] | AIN[1] | Y[3] | — | SERCOM0/ PAD[1] | TCC0/WO[1] | — | — | — | CCL0/ IN[1] | AVDD |
| 7 | PA06 | EXTINT[6] | — | AIN[6] | AIN[2] | Y[4] | — | SERCOM0/ PAD[2] | TCC1/WO[0] | — | — | — | CCL0/ IN[2] | AVDD |
| 8 | PA07 | EXTINT[7] | — | AIN[7] | AIN[3] | Y[5] | — | SERCOM0/ PAD[3] | TCC1/WO[1] | — | — | — | CCL0/ OUT[0] | AVDD |
| 9 | AVDD | — | — | — | — | — | — | — | — | — | — | — | — | AVDD |
| 10 | GND | — | — | — | — | — | — | — | — | — | — | — | — | GND |
| 11 | PA08 | NMI | — | AIN[8] | — | X[0]/Y[16] | SERCOM0/ PAD[0] | SERCOM2/ PAD[0] | TCC0/WO[0] | TCC1/ WO[2] | — | — | CCL1/ IN[3] | VDDIO |
| 12 | PA09 | EXTINT[9] | — | AIN[9] | — | X[1]/Y[17] | SERCOM0/ PAD[1] | SERCOM2/ PAD[1] | TCC0/WO[1] | TCC1/ WO[3] | — | — | CCL1/ IN[4] | VDDIO |
| 13 | PA10 | EXTINT[10] | — | AIN[10] | — | X[2]/Y[18] | SERCOM0/ PAD[2] | SERCOM2/ PAD[2] | TCC1/WO[0] | TCC0/ WO[2] | — | GCLK_IO[4] | CCL1/ IN[5] | VDDIO |
| 14 | PA11 | EXTINT[11] | — | AIN[11] | — | X[3]/Y[19] | SERCOM0/ PAD[3] | SERCOM2/ PAD[3] | TCC1/WO[1] | TCC0/ WO[3] | — | GCLK_IO[5] | CCL1/ OUT[1] | VDDIO |
| 15 | PA14 | EXTINT[14] | — | — | — | — | SERCOM2/ PAD[2] | — | TC4/WO[0] | TCC0/ WO[4] | — | GCLK_IO[0] | — | VDDIO |
| 16 | PA15 | EXTINT[15] | — | — | — | — | SERCOM2/ PAD[3] | — | TC4/WO[1] | TCC0/ WO[5] | — | GCLK_IO[1] | — | VDDIO |
| 17 | PA16 | EXTINT[0] | — | — | — | X[4]/Y[20] | SERCOM1/ PAD[0] | SERCOM3/ PAD[0] | TCC2/WO[0] | TCC0/ WO[6] | — | GCLK_IO[2] | CCL0/ IN[0] | VDDIO |
| 18 | PA17 | EXTINT[1] | — | — | — | X[5]/Y[21] | SERCOM1/ PAD[1] | SERCOM3/ PAD[1] | TCC2/WO[1] | TCC0/ WO[7] | — | GCLK_IO[3] | CCL0/ IN[1] | VDDIO |
| 19 | PA18 | EXTINT[2] | — | — | — | X[6]/Y[22] | SERCOM1/ PAD[2] | SERCOM3/ PAD[2] | TC4/WO[0] | TCC0/ WO[2] | — | AC/CMP[0] | CCL0/ IN[2] | VDDIO |
| 20 | PA19 | EXTINT[3] | — | — | — | X[7]/Y[23] | SERCOM1/ PAD[3] | SERCOM3/ PAD[3] | TC4/WO[1] | TCC0/ WO[3] | — | AC/CMP[1] | CCL0/ OUT[0] | VDDIO |
| 21 | PA22 | EXTINT[6] | — | — | — | X[10]/Y[26] | SERCOM3/ PAD[0] | — | TC0/WO[0] | TCC0/ WO[4] | — | GCLK_IO[6] | CCL2/ IN[6] | VDDIO |
| 22 | PA23 | EXTINT[7] | — | — | — | X[11]/Y[27] | SERCOM3/ PAD[1] | — | TC0/WO[1] | TCC0/ WO[5] | — | GCLK_IO[7] | CCL2/ IN[7] | VDDIO |
| 23 | PA24 | EXTINT[12] | — | — | — | — | SERCOM3/ PAD[2] | — | TC1/WO[0] | TCC1/ WO[2] | — | — | CCL2/ IN[8] | VDDIO |
| 24 | PA25 | EXTINT[13] | — | — | — | — | SERCOM3/ PAD[3] | — | TC1/WO[1] | TCC1/ WO[3] | — | — | CCL2/ OUT[2] | VDDIO |
| 25 | PA27 | EXTINT[15] | — | — | — | — | — | — | — | — | — | GCLK_IO[0] | — | VDDIN |
| 26 | RESET | — | — | — | — | — | — | — | — | — | — | — | — | — |
| 27 | PA28 | EXTINT[8] | — | — | — | — | — | — | — | — | — | GCLK_IO[0] | — | VDDIN |
| 28 | GND | — | — | — | — | — | — | — | — | — | — | — | — | GND |
| 29 | VDDCORE | — | — | — | — | — | — | — | — | — | — | — | — | VDDCORE |
| 30 | VDDIN | — | — | — | — | — | — | — | — | — | — | — | — | VDDIN |
| 31 | PA30 | EXTINT[10] | — | — | — | — | — | SERCOM1/ PAD[2] | TCC1/WO[0] | — | CORTEX_M0P/ SWCLK | GCLK_IO[0] | CCL1/ IN[3] | VDDIN |
| 32 | PA31 | EXTINT[11] | — | — | — | — | — | SERCOM1/ PAD[3] | TCC1/WO[1] | — | CORTEX_M0P/ SWDIO | — | CCL1/ OUT[1] | VDDIN |