39.4.5.2.1 STR_WD0
| Name: | STR_WD0 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| OPCODE[3:0] | IE | ||||||||
| Access | |||||||||
| Reset | |||||||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| REG[3:0] | |||||||||
| Access | |||||||||
| Reset | |||||||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| REGAD[3:0] | |||||||||
| Access | |||||||||
| Reset | |||||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ARGS[2:0] | |||||||||
| Access | |||||||||
| Reset | |||||||||
Bits 31:28 – OPCODE[3:0] Instruction Code
Bit 24 – IE Interrupt Enable
| Value | Description |
|---|---|
| 0 | The End of Instruction interrupt is disabled. |
| 1 | The End of Instruction interrupt is enabled. |
