22.6.13 Debug Unit Force NTRST Register

Name: DBGU_FNR
Offset: 0x0048
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        FNTRST 
Access R/W 
Reset 0 

Bit 0 – FNTRST Force NTRST

ValueDescription
0 NTRST of the Arm processor’s TAP controller is driven by the power_on_reset signal.
1 NTRST of the Arm processor’s TAP controller is held low.