2.1 Control Loop Design of 48V to 5V Buck Converter Using MIC28515

The schematic shown in Figure 2-1 represents the MIC28515 evaluation board configured for this example and the Table 2-1 summarizes the design specifications. The design is based on an input voltage of 48V, an output voltage of 5V, and a maximum load current of 5A, with a switching frequency of 266 kHz. Additionally, a tight output voltage ripple requirement of 20 mV is specified, which necessitates the use of low-ESR output capacitors and, consequently, a Type 3 ripple injection scheme. The key components involved in the control loop design are highlighted in red, including the feedback divider (R3, R18) the feed-forward capacitor (C1) and the ripple injection network (R15, C10).

Table 2-1. 
ParameterValue
Input Voltage 48 V
Output Voltage5 V
Maximum Output Current 5 A
Switching Frequency 266 kHz
Output Ripple Requirement 20 mV
Figure 2-1. MIC28515 EVB Schematic With Ripple Injection Components and Feedback Resistor Highlighted

The actual evaluation board uses specific reference designators (R3, R18, C1, R15 and C10). To simplify the control-loop design discussion and derivations throughout this document, generic component names are used. The table below maps the generic design variables used in the equations to their corresponding components in the evaluation board schematic.

Table 2-2. 
Generic Name (Used in App Note)EVB Schematic ReferenceFunction
R1R3Upper feedback resistor
R2R18Lower feedback resistor
CFFC1Feed-forward capacitor
RINJR15Ripple injection resistor
CINJC10Ripple injection capacitor

The primary design objective in this example is to determine appropriate values for the ripple injection components such that the loop achieves the desired crossover frequency, maintains sufficient phase margin and delivers fast transient response while meeting the low output ripple specification.

This example will illustrate how the theoretical relationships derived earlier can be directly applied to select component values and validate the overall control loop performance.