8.1 Change of the field PMC_MCKR.PRES is not allowed if Master/Processor Clock Prescaler frequency is too high

PMC_MCKR.PRES cannot be changed if the clock applied to the Master/Processor Clock Prescaler (see “Master Clock Controller” in section “Power Management Controller (PMC)” of the SAMA5D2 Series data sheet) is greater than 312 MHz (VDDCORE[1.1, 1.32]) and 394 MHz (VDDCORE[1.2, 1.32]).

Work around

  1. Set PMC_MCKR.CSS to MAIN_CLK.
  2. Set PMC_MCKR.PRES to the required value.
  3. Change PMC_MCKR.CSS to the new clock source (PLLA_CLK, UPLLCK).