17.6.2.3 Generic Clock Generator

Each Generator (GCLK_GEN) can be set to run from one of up to 9 different clock sources except GCLK_GEN1, which can be set to run from one of up to 8 sources, as GCLK_GEN1 is the only Generator that can be selected as source to others Generators.

Each generator GCLK_GENn can be connected to one specific pin GCLK_IO[n]. This GCLK_IO[n] pin can be set either to act as source to GCLK_GENn or to output the clock signal generated by GCLK_GENn.

The selected source can be divided. Each Generator can be enabled or disabled independently.

Each GCLK_GENn clock signal can then be used as clock source for Peripheral Channels. Each Generator output is allocated to one or several Peripherals.

GCLK_GEN0 is used as GCLK_MAIN for the synchronous clock controller inside the Main Clock (MCLK) . Refer to the Main Clock (MCLK) description for details on the synchronous clock generation.