14 Implementation Defined Attribution Unit (IDAU)

The SAU is a Memory Protection Unit (MPU) like hardware embedded in the core. The role of the SAU is to manage all the Secure and Non-Secure transactions coming from the core and the debugger. However, using the SAU implies that the security configuration must be propagated somewhere else in the MCU architecture for security awareness.

The IDAU is a hardware unit external to the core, which is used to indicate to the processor if a particular memory region is Secure (S), Non-Secure Callable (NSC), or Non-Secure (NS). It can also mark a memory region to be exempted from security checking. The Cortex-M23 checks each access (fetch or data) in the IDAU, which returns the privilege information about that specific address. If the access is not permitted, the CPU enters a HardFault exception.

The following table provides the PIC32CM LS00/LS60 memory space security attributions:

Software can check the privilege state of a memory location by using the Cortex-M23 Test Target instructions: TT, TTT, TTA, and TTAT.

The memory location is referenced using the Cortex-M23 IREGION bit field, which specifies the IDAU region number (Refer to the ARMv8-M Architecture Reference Manual for more information).