10.2.1.1 PIC32CM LE00 User Row

Table 10-10. PIC32CM LE00 UROW Bitfields Definition
Bit Pos.NameUsageValue(1)Related Peripheral Register
2:0SULCKNVM UnLock Bits (BOOTPROT/BS)0x7NVMCTRL.SULCK
5:3NSULCKNVM UnLock Bits (ANS, DNS) 0x6 NVMCTRL.NSULCK
6ReservedReservedAll '1's Reserved
12:7BOD33_LEVELBOD33 threshold level at power-on0x4SUPC.BOD33
13BOD33_DISBOD33 Disable at power-on0x0

(<=> BOD33 enabled)

SUPC.BOD33
15:14BOD33_ACTIONBOD33 Action at power-on0x1SUPC.BOD33
24:16BOD12/BOD12PLL Calibration ParametersDO NOT CHANGE(See Note 1 under Caution)To ReadReserved
25WDT_RUNSTDBYWDT Runstdby at power-on0x0WDT.CTRLA
26WDT_ENABLEWDT Enable at power-on0x0WDT.CTRLA
27WDT_ALWAYSONWDT Always-On at power-on0x0WDT.CTRLA
31:28WDT_PERWDT Period at power-on0xBWDT.CONFIG
35:32WDT_WINDOWWDT Window mode time-out at power-on0xBWDT.CONFIG
39:36WDT_EWOFFSETWDT Early Warning Interrupt Time Offset at power-on0xBWDT.EWCTRL
40WDT_WENWDT Timer Window Mode Enable at power-on0x0WDT.CTRLA
41BOD33_HYSTBOD33 Hysteresis configuration at power-on0x0SUPC.BOD33
287:42ReservedReservedReservedReserved
Note:
  1. Fresh from factory value or after a ChipErase_ALL command.
CAUTION:
  1. BOD12 and BOD12PLL are calibrated in production and their calibration parameters must not be changed to ensure the correct device behavior.
Table 10-11. PIC32CM LE00 UROW Mapping
OffsetBit

Pos.

Name
0x007:0BOD33_LEVEL-NSULCKSULCK
0x0115:8BOD33_ACTIONBOD33_DISBOD33_LEVEL
0x0223:16BOD12/BOD12PLL Calibration Parameters
0x0331:24WDT_PERWDT_ALWAYSONWDT_ENABLEWDT_RUNSTDBYBOD12/BOD12PLL Calibration Parameters
0x0439:32WDT_EWOFFSETWDT_WINDOW
0x0547:40ReservedBOD33_HYSTWDT_WEN
0x06-0x23287:48Reserved