11.2.2 Interrupt Line Mapping
Each interrupt line is connected to one peripheral instance, as shown in the table below. Each peripheral can have one or more interrupt flags, located in the peripheral’s Interrupt Flag Status and Clear (INTFLAG) register.
An interrupt flag is set when the interrupt condition occurs. Each interrupt in the peripheral can be individually enabled by writing a ‘1’ to the corresponding bit in the peripheral’s Interrupt Enable Set (INTENSET) register, and disabled by writing ‘1’ to the corresponding bit in the peripheral’s Interrupt Enable Clear (INTENCLR) register.
An interrupt request is generated from the peripheral when the interrupt flag is set and the corresponding interrupt is enabled.
The interrupt requests for one peripheral are ORed together on system level, generating one interrupt request for each peripheral. An interrupt request will set the corresponding interrupt pending bit in the NVIC interrupt pending registers (SETPEND/CLRPEND bits in the ISPR/ICPR).
For the NVIC to activate the interrupt, it must be enabled in the NVIC interrupt enable register (SETENA/CLRENA bits in ISER/ICER). The NVIC interrupt priority registers, IPR0-IPR11, provide a priority field for each interrupt.
| Peripheral Source | Peripheral Interrupt(s) | NVIC line |
|---|---|---|
| EIC NMI – External Interrupt Controller | NMI | NMI |
|
PM – Power Manager | PLRDY | 0 |
| MCLK - Main Clock | CKRDY | |
| OSCCTRL - Oscillators Controller | XOSCRDY | |
| XOSCFAIL | ||
| OSC16MRDY | ||
| DFLLULPRDY | ||
| DFLLULPLOCK | ||
| DFLLULPNOLOCK | ||
| DPLLLCKR | ||
| DPLLLCKF | ||
| DPLLLTO | ||
| DPLLLDRTO | ||
| DFLLRDY | ||
| DFLLOOB | ||
| DFLLLCKF | ||
| DFLLLCKC | ||
| DFLLRCS | ||
| OSC32KCTRL - 32.768 kHz Oscillators Controller | XOSC32KRDY | |
| CLKFAIL | ||
| SUPC - Supply Controller | BOD33RDY | |
| BOD33DET | ||
| B33SRDY | ||
| VREGRDY | ||
| VCORERDY | ||
| ULPVREFRDY | ||
| VCOREPLLRDY | ||
| WDT – Watchdog Timer | EW | 1 |
| RTC – Real Time Counter | CMP0 | 2 |
| CMP1 | ||
| PER0 | ||
| PER1 | ||
| PER2 | ||
| PER3 | ||
| PER4 | ||
| PER5 | ||
| PER6 | ||
| PER7 | ||
| OVF | ||
| TAMPER | ||
| ALARM0 | ||
| EIC – External Interrupt Controller | EXTINT0 | 3 |
| EXTINT1 | 4 | |
| EXTINT2 | 5 | |
| EXTINT3 | 6 | |
| EXTINT4 | 7 | |
| EXTINT5 | 8 | |
| EXTINT6 | 9 | |
| EXTINT7 | 10 | |
| EXTINT8-15 | 11 | |
| NSCHK(2) | ||
| FREQM - Frequency Meter | DONE | 12 |
| NVMCTRL – Non-Volatile Memory Controller | DONE | 13 |
| PROGE | ||
| LOCKE | ||
| NVME | ||
| KEYE | ||
| NSCHK(2) | ||
| PORT - I/O Pin Controller | NSCHK(2) | 14 |
| DMAC - Direct Memory Access Controller | SUSP0 | 15 |
| TERR0 | ||
| TCMPL0 | ||
| SUSP1 | 16 | |
| TERR1 | ||
| TCMPL1 | ||
| SUSP2 | 17 | |
| TERR2 | ||
| TCMPL2 | ||
| SUSP3 | 18 | |
| TERR3 | ||
| TCMPL3 | ||
| SUSP4-15 | 19 | |
| TERR4-15 | ||
| TCMPL4-15 | ||
| USB | EORSM/DNRSM | 20 |
| EORST/RST | ||
| LPMNYET/DCONN | ||
| LPMSUSP/DDISC | ||
| RAMACER | ||
| RXSTP/TXSTP | ||
| SOF/HSOF | ||
| STALL0/STALL | ||
| STALL1 | ||
| SUSPEND | ||
| TRCPT0 | ||
| TRCPT1 | ||
| TRFAIL0/TRFAIL | ||
| TRFAIL1/PERR | ||
| UPRSM | ||
| WAKEUP | ||
| EVSYS – Event System | EVD0 | 21 |
| OVR0 | ||
| EVD1 | 22 | |
| OVR1 | ||
| EVD2 | 23 | |
| OVR2 | ||
| EVD3 | 24 | |
| OVR3 | ||
| EVD4 | 25 | |
| OVR4 | ||
| EVD5 | 26 | |
| OVR5 | ||
| EVD6 | 27 | |
| OVR6 | ||
| EVD7 | 28 | |
| OVR7 | ||
| NSCHK(2) | 29 | |
| PAC - Peripheral Access Controller | ERR | 30 |
| SERCOM0 – Serial Communication
Interface 0 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 31 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 32 | |
| Interrupt Bit 2 (RXC, DRDY) | 33 | |
| Interrupt Bits 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 34 | |
| SERCOM1 – Serial Communication
Interface 1 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 35 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 36 | |
| Interrupt Bit 2 (RXC, DRDY) | 37 | |
| Interrupt Bit 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 38 | |
| SERCOM2 – Serial Communication
Interface 2 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 39 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 40 | |
| Interrupt Bit 2 (RXC, DRDY) | 41 | |
| Interrupt Bits 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 42 | |
| SERCOM3 – Serial Communication
Interface 0 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 43 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 44 | |
| Interrupt Bit 2 (RXC, DRDY) | 45 | |
| Interrupt Bits 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 46 | |
| SERCOM4 – Serial Communication
Interface 1 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 47 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 48 | |
| Interrupt Bit 2 (RXC, DRDY) | 49 | |
| Interrupt Bit 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 50 | |
| SERCOM5 – Serial Communication
Interface 2 (Interrupt Sources vary depending on SERCOM mode) | Interrupt Bit 0 (DRE, MB, PREC) | 51 |
| Interrupt Bit 1 (TXC, SB, AMATCH) | 52 | |
| Interrupt Bit 2 (RXC, DRDY) | 53 | |
| Interrupt Bits 3-7 (RXS, TXFE, SSL, CTSIC, RXFF, RXBRK, ERROR) | 54 | |
| TC0 – Timer Counter 0 | ERR | 55 |
| MC0 | ||
| MC1 | ||
| OVF | ||
| TC1 – Timer Counter 1 | ERR | 56 |
| MC0 | ||
| MC1 | ||
| OVF | ||
| TC2 – Timer Counter 2 | ERR | 57 |
| MC0 | ||
| MC1 | ||
| OVF | ||
| TCC0 – Timer Counter for Control 0 | ERR | 58 |
| MC0-3 | ||
| OVF | ||
| TRG | ||
| CNT | ||
| DFS | ||
| UFS | ||
| FAULTA | ||
| FAULTB | ||
| FAULT0 | ||
| FAULT1 | ||
| TCC1 – Timer Counter for Control 1 | ERR | 59 |
| MC0-1 | ||
| OVF | ||
| TRG | ||
| CNT | ||
| DFS | ||
| UFS | ||
| FAULTA | ||
| FAULTB | ||
| FAULT0 | ||
| FAULT1 | ||
| TCC2 – Timer Counter for Control 2 | ERR | 60 |
| MC0-1 | ||
| OVF | ||
| TRG | ||
| CNT | ||
| DFS | ||
| UFS | ||
| FAULTA | ||
| FAULTB | ||
| FAULT0 | ||
| FAULT1 | ||
| TCC3 – Timer Counter for Control 3 | ERR | 61 |
| MC0-3 | ||
| OVF | ||
| TRG | ||
| CNT | ||
| DFS | ||
| UFS | ||
| FAULTA | ||
| FAULTB | ||
| FAULT0 | ||
| FAULT1 | ||
| ADC – Analog-to-Digital Converter | OVERRUN | 62 |
| WINMON | ||
| RESRDY | 63 | |
| AC – Analog Comparator | COMP0-3 | 64 |
| WIN0-1 | ||
| DAC – Digital-to-Analog Converter | UNDERRUN0-1 | 65 |
| EMPTY0-1 | 66 | |
| PTC – Peripheral Touch Controller | EOC | 67 |
| WCOMP | ||
| TRNG - True Random Number Generator | DATARDY | 68 |
| I2S - Inter-IC Sound Controller | RXRDY0-1 | 69 |
| TXRDY0-1 | ||
| RXOR0-1 | ||
| TXUR0-1 | ||
| TRAM - TrustRAM | DRP | 70 |
| ERR |
- Refer to the Configuration Summary for the list of peripherals and peripheral instances present in each variant.
- NSCHK interrupt sources will not generate any interrupts for the PIC32CM LE00 devices.