Software Configuration

The following configuration must be performed:

  1. Set NFD0_ON_D16 = 1 in the SFR_CCFG_EBICSA register.
  2. Assign the EBI CS2 to the NAND Flash by setting the EBI_CS2A bit in the SFR_CCFG_EBICSA register.
  3. Reserve A21 / A22 for ALE / CLE functions. Address and Command Latches are controlled respectively by setting to 1 the address bits A21 and A22 during accesses.
  4. Configure PD14 as an input to manage the Ready/Busy signal.
  5. Configure Static Memory Controller CS2 Setup, Pulse, Cycle and Mode according to NAND Flash timings, data bus width and system bus frequency.