10.1.6.9 Ethernet MAC (GMAC)

GMAC timings are provided in the following conditions:

1.8V domain: VDDIO from 1.7V to 1.9V, maximum external capacitor = 10 pF, DRV = 1, SR = 0
3.3V domain: VDDIO from 3.0V to 3.6V, maximum external capacitor = 10 pF, DRV = 0, SR = 0

Figure 10-31. Ethernet MAC MDIO Interface Timings Characteristics

Table 10-33. Ethernet MAC Signals Relative to MDC (MDIO Mode)
Symbol	Parameters	Min	Max	Unit
GMAC₁	MDIO input data setup time before MDC rising edge	10	–	ns
GMAC₂	MDIO input data hold time after MDC rising edge	0	–	ns
GMAC₃	MDC falling edge to MDIO output data valid	0	25	ns

Figure 10-32. Ethernet MAC RMII Mode Timing Diagram

Table 10-34. Ethernet MAC RMII Mode Timing Characteristics
Symbol	Parameters	Conditions	Min	Typ	Max	Unit
GMAC₂₁	TXEN toggling from REFCK rising	–	2	–	16	ns
GMAC₂₂	TX[1:0] toggling from REFCK rising	–	2	–	16	ns
GMAC₂₃	Setup for RX[1:0] from REFCK rising	–	4	–	–	ns
GMAC₂₄	Hold for RX[1:0] from REFCK rising	–	2	–	–	ns
GMAC₂₅	Setup for RXER from REFCK rising	–	4	–	–	ns
GMAC₂₆	Hold for RXER from REFCK rising	–	2	–	–	ns
GMAC₂₇	Setup for CRSDV from REFCK rising	–	4	–	–	ns
GMAC₂₈	Hold for CRSDV from REFCK rising	–	2	–	–	ns

Figure 10-33. Ethernet MAC RGMII Timing Diagram

Table 10-35. Ethernet MAC RGMII Mode Timing Characteristics
Symbol	Parameter	Min	Max	Unit
GMAC₂₉	TXCTL toggling from TXCK edge	-500	500	ps
GMAC₃₀	TXD[3:0] toggling from TXCK edge	-500	500	ps
GMAC₃₁	RXD[3:0] Setup time before RXCK edge	1.0	–	ns
GMAC₃₂	RXD[3:0] Hold time after RXCK edge	1.0	–	ns
GMAC₃₃	RXCTL Setup time before RXCK edge	1.0	–	ns
GMAC₃₄	RXCTL Hold time after RXCK edge	1.0	–	ns