The flowcharts shown in this section provide examples for read and
write operations. A polling or interrupt method can be used to check the status bits. The
interrupt method requires that the Interrupt Enable register (FLEX_TWI_IER) be configured
first.
Figure 8-117. TWI Write Operation with Single Data Byte without Internal
AddressFigure 8-118. TWI Write Operation with Single Data Byte and Internal
AddressFigure 8-119. TWI Write Operation with Multiple Data Bytes with or without
Internal AddressFigure 8-120. SMBus Write Operation with Multiple Data Bytes with or
without Internal Address and PEC SendingFigure 8-121. SMBus Write Operation with Multiple Data Bytes with PEC and
Alternative Command ModeFigure 8-122. TWI Write Operation with Multiple Data Bytes and Read
Operation with Multiple Data Bytes (Sr)Figure 8-123. TWI Write Operation with Multiple Data Bytes + Read Operation
and Alternative Command Mode + PECFigure 8-124. TWI Read Operation with Single Data Byte without Internal
AddressFigure 8-125. TWI Read Operation with Single Data Byte and Internal
AddressFigure 8-126. TWI Read Operation with Multiple Data Bytes with or without
Internal AddressFigure 8-127. TWI Read Operation with Multiple Data Bytes with or without
Internal Address with PECFigure 8-128. TWI Read Operation with Multiple Data Bytes with Alternative
Command Mode with PECFigure 8-129. TWI Read Operation with Multiple Data Bytes + Write Operation
with Multiple Data Bytes (Sr)Figure 8-130. TWI Read Operation with Multiple Data Bytes + Write with
Alternative Command Mode with PEC