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5.2.2 Embedded Characteristics
- Up to 32-bit Host Interface
- Supports Single Scan Active TFT Display
- Supports Parallel
RGB, MIPI DSI and Single Channel
LVDS Interfaces
- Supports 12-, 16-, 18- and 24-bit Output Mode
- Supports Spatial Dithering for 12-, 16-, and 18-bit Output Mode
- Asynchronous Output Mode Supported
- 1, 2, 4, 8 bits per Pixel (Palletized)
- 12, 16, 18, 19, 24, 25 and 32 bits per Pixel (Non-palletized)
- Supports One Base Layer (Background)
- Supports Overlay 1 Layer
- Supports Overlay 2 Layer
- Supports High-End Overlay (HEO) Layer
- High-End Overlay Supports 4:2:0 Planar Mode and Semiplanar Mode
- High-End Overlay Supports 4:2:2 Planar Mode, Semiplanar Mode and Packed
- Little Endian Memory Organization
- Programmable Timing Engine, with Integer Clock Divider
- Programmable Polarity for Data, Line Synchro and Frame Synchro
- Up to 1024x768 (XGA) with Overlay (Application-Dependent). Still Image up to 1280x720 (720p)
- Color Look-up Table (CLUT) with up to 256 Entries and Predefined 8-bit Alpha
- Gamma Correction through Color Look-Up Table (CLUT)
- Programmable Negative and Positive Row Striding for all Layers
- Horizontal and Vertical Rescaling Unit with Edge Interpolation and Independent Non-Integer Ratio, up to 1280x720 (720p)
- Bandwidth and Power Optimization with Hidden Section of Base
Layer
- Integrates Fully Programmable Color Space Conversion
- Blender Function Supports Arbitrary 8-bit Alpha Value and Chroma Keying