16.8.8 APBB Mask

Name: APBBMASK
Offset: 0x18
Reset: 0x0000004F
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
     PORTNVMCTRLDSUUSB 
Access R/WR/WR/WR/W 
Reset 1111 

Bit 3 – PORT PORT APBB Clock Enable

ValueDescription
0 The APBB clock for the PORT is stopped.
1 The APBB clock for the PORT is enabled.

Bit 2 – NVMCTRL NVMCTRL APBB Clock Enable

ValueDescription
0 The APBB clock for the NVMCTRL is stopped
1 The APBB clock for the NVMCTRL is enabled

Bit 1 – DSU DSU APBB Clock Enable

ValueDescription
0 The APBB clock for the DSU is stopped
1 The APBB clock for the DSU is enabled

Bit 0 – USB USB APBB Clock Enable

ValueDescription
0 The APBB clock for the USB is stopped
1 The APBB clock for the USB is enabled

Reserved bits are unused and reserved for future use. For compatibility with future devices, always write reserved bits to their reset value. If no reset value is given, write 0.