16.8.8 APBB Mask
Name: | APBBMASK |
Offset: | 0x18 |
Reset: | 0x0000004F |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
PORT | NVMCTRL | DSU | USB | ||||||
Access | R/W | R/W | R/W | R/W | |||||
Reset | 1 | 1 | 1 | 1 |
Bit 3 – PORT PORT APBB Clock Enable
Value | Description |
---|---|
0 | The APBB clock for the PORT is stopped. |
1 | The APBB clock for the PORT is enabled. |
Bit 2 – NVMCTRL NVMCTRL APBB Clock Enable
Value | Description |
---|---|
0 | The APBB clock for the NVMCTRL is stopped |
1 | The APBB clock for the NVMCTRL is enabled |
Bit 1 – DSU DSU APBB Clock Enable
Value | Description |
---|---|
0 | The APBB clock for the DSU is stopped |
1 | The APBB clock for the DSU is enabled |
Bit 0 – USB USB APBB Clock Enable
Value | Description |
---|---|
0 | The APBB clock for the USB is stopped |
1 | The APBB clock for the USB is enabled |
Reserved bits are unused and reserved for future use. For compatibility with future devices, always write reserved bits to their reset value. If no reset value is given, write 0.