16.8.9 APBC Mask
Name: | APBCMASK |
Offset: | 0x1C |
Reset: | 0x0007FFFF |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
CCL | TRNG | AES | |||||||
Access | R/W | R/W | R/W | ||||||
Reset | 1 | 1 | 1 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
SLCD | PTC | AC | ADC | TC3 | TC2 | TC1 | TC0 | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TCC0 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | SERCOM1 | SERCOM0 | EVSYS | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bit 18 – CCL CCL APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the CCL is stopped. |
1 | The APBC clock for the CCL is enabled. |
Bit 17 – TRNG TRNG APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TRNG is stopped. |
1 | The APBC clock for the TRNG is enabled. |
Bit 16 – AES AES APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the AES is stopped. |
1 | The APBC clock for the AES is enabled. |
Bit 15 – SLCD SLCD
Value | Description |
---|---|
0 | The APBC clock for the SLCD is stopped. |
1 | The APBC clock for the SLCD is enabled. |
Bit 14 – PTC PTC APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the PTC is stopped. |
1 | The APBC clock for the PTC is enabled. |
Bit 13 – AC AC APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the AC is stopped. |
1 | The APBC clock for the AC is enabled. |
Bit 12 – ADC ADC APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the ADC is stopped. |
1 | The APBC clock for the ADC is enabled. |
Bits 8, 9, 10, 11 – TCx TCx APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCx is stopped. |
1 | The APBC clock for the TCx is enabled. |
Bit 7 – TCC0 TCC0 APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the TCC0 is stopped. |
1 | The APBC clock for the TCC0 is enabled. |
Bits 1, 2, 3, 4, 5, 6 – SERCOMx SERCOMx APBC Mask Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the SERCOMx is stopped. |
1 | The APBC clock for the SERCOMx is enabled. |
Bit 0 – EVSYS EVSYS APBC Clock Enable
Value | Description |
---|---|
0 | The APBC clock for the EVSYS is stopped. |
1 | The APBC clock for the EVSYS is enabled. |