16.8.9 APBC Mask

Name: APBCMASK
Offset: 0x1C
Reset: 0x0007FFFF
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
      CCLTRNGAES 
Access R/WR/WR/W 
Reset 111 
Bit 15141312111098 
 SLCDPTCACADCTC3TC2TC1TC0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 
Bit 76543210 
 TCC0SERCOM5SERCOM4SERCOM3SERCOM2SERCOM1SERCOM0EVSYS 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bit 18 – CCL CCL APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the CCL is stopped.
1 The APBC clock for the CCL is enabled.

Bit 17 – TRNG TRNG APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TRNG is stopped.
1 The APBC clock for the TRNG is enabled.

Bit 16 – AES AES APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the AES is stopped.
1 The APBC clock for the AES is enabled.

Bit 15 – SLCD SLCD

ValueDescription
0 The APBC clock for the SLCD is stopped.
1 The APBC clock for the SLCD is enabled.

Bit 14 – PTC PTC APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the PTC is stopped.
1 The APBC clock for the PTC is enabled.

Bit 13 – AC AC APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the AC is stopped.
1 The APBC clock for the AC is enabled.

Bit 12 – ADC ADC APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the ADC is stopped.
1 The APBC clock for the ADC is enabled.

Bits 8, 9, 10, 11 – TCx TCx APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TCx is stopped.
1 The APBC clock for the TCx is enabled.

Bit 7 – TCC0 TCC0 APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the TCC0 is stopped.
1 The APBC clock for the TCC0 is enabled.

Bits 1, 2, 3, 4, 5, 6 – SERCOMx SERCOMx APBC Mask Clock Enable

ValueDescription
0 The APBC clock for the SERCOMx is stopped.
1 The APBC clock for the SERCOMx is enabled.

Bit 0 – EVSYS EVSYS APBC Clock Enable

ValueDescription
0 The APBC clock for the EVSYS is stopped.
1 The APBC clock for the EVSYS is enabled.