16.8.6 AHB Mask

Name: AHBMASK
Offset: 0x10
Reset: 0x000007FF
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
      ReservedReservedNVMCTRL 
Access R/WR/WR/W 
Reset 111 
Bit 76543210 
 PACReservedDSUUSBDMACAPBCAPBBAPBA 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bits 10,9,6 – Reserved Reserved bits

Reserved bits are unused and reserved for future use. For compatibility with future devices, always write reserved bits to their reset value. If no reset value is given, write 0.

Bit 8 – NVMCTRL NVMCTRL AHB Clock Enable

ValueDescription
0 The AHB clock for the NVMCTRL is stopped
1 The AHB clock for the NVMCTRL is enabled

Bit 7 – PAC PAC AHB Clock Enable

ValueDescription
0 The AHB clock for the PAC is stopped.
1 The AHB clock for the PAC is enabled.

Bit 5 – DSU DSU AHB Clock Enable

ValueDescription
0 The AHB clock for the DSU is stopped.
1 The AHB clock for the DSU is enabled.

Bit 4 – USB USB AHB Clock Enable

ValueDescription
0 The AHB clock for the USB is stopped.
1 The AHB clock for the USB is enabled.

Bit 3 – DMAC DMAC AHB Clock Enable

ValueDescription
0 The AHB clock for the DMAC is stopped.
1 The AHB clock for the DMAC is enabled.

Bit 2 – APBC APBC AHB Clock Enable

ValueDescription
0 The AHB clock for the APBC is stopped.
1 The AHB clock for the APBC is enabled

Bit 1 – APBB APBB AHB Clock Enable

ValueDescription
0 The AHB clock for the APBB is stopped.
1 The AHB clock for the APBB is enabled.

Bit 0 – APBA APBA AHB Clock Enable

ValueDescription
0 The AHB clock for the APBA is stopped.
1 The AHB clock for the APBA is enabled.