42.6.4 Interrupts

The SLCD has the following interrupt sources:

  • Frame Counter 0 Overflows (FC0O): Indicates that the frame counter 0 has overflowed, it has reached its top value and wrapped to zero. Refer to 42.6.2.1 Frame Counters for details.
  • Frame Counter 1 Overflows (FC1O): Indicates that the frame counter 1 has overflowed, it has reached its top value and wrapped to zero. Refer to 42.6.2.1 Frame Counters for details.
  • Frame Counter 2 Overflows (FC2O): Indicates that the frame counter 2 has overflowed, it has reached its top value and wrapped to zero. Refer to 42.6.2.1 Frame Counters for details.
  • VLCD Ready Toggle (VLCDRT): Indicates that status of LCD Ready has changed.
  • VLCD Status Toggle (VLCDST): Indicates that relation between VLCD and chip VDD has changed.
  • Pump Run Status Toggle (PRST): Indicates that Pump Run Status has changed.

Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status and Clear (INTFLAG) register is set when the interrupt condition occurs. Each interrupt can be individually enabled by writing a one to the corresponding bit in the Interrupt Enable Set (INTENSET) register, and disabled by writing a one to the corresponding bit in the Interrupt Enable Clear (INTENCLR) register. An interrupt request is generated when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt request remains active until the interrupt flag is cleared, the interrupt is disabled, or the SLCD is reset. See INTFLAG42.8.8 Interrupt Flag for details on how to clear interrupt flags. All interrupt requests from the peripheral are ORed together on system level to generate one combined interrupt request to the NVIC. Refer to the Nested Vector Interrupt Controller for details. The user must read the INTFLAG register to determine which interrupt condition is present.

Note: Interrupts must be globally enabled for interrupt requests to be generated.