42.6.2.1 Frame Counters

For several functions (e.g., blinking, or automated modes) a frame counter is required as time base. There are three independent frame counters FC0, FC1 and FC2, which can be associated with any function.

Each frame counter x is enabled by writing a '1' to the Frame Counter x Enable bit in the Control D register (CTRLD.FCxEN), and disabled by writing a '0' to it. When disabling a frame counter, it will be disabled once the CTRLD register is synchronized.

The frame counter is synchronized to the LCD frame start and generates an internal event each time the counter overflows. The overflow value is selected by writing the Write Overflow bits in the Frame Counter x register (FCx.OVF). The FCx register can only be written when the frame counter x is disabled (CTRLD.FCxEN=0).

The frequency of the internal event is defined by the following formula:

f_{FCx} = \frac{FrameRate}{(FCx.OVF \times 8) + 1}

The prescaler of 8 can be bypassed by writing a '1' to the Prescaler Bypass bit in the FCx register (FCx.PB):

f_{FCx} = \frac{FrameRate}{(FCx.OVF) + 1}