3.2 In-System Programming (ISP) Header (J104)
The ISP header (J104) is a standard 2x3-pin header. It allows in-circuit emulation and debugging
using Microchip’s in-circuit emulator tools, and it allows direct programming of the ATA8510 SoC. The ISP header supports external debuggers, such as
ATMEL-ICE. The following figure illustrates the connection between the ICSP header, external
debuggers, and the ATA8510 Curiosity Board.
Note: Ensure that the jumper is placed on header
J103 between pins 1 and 2 during programming.
The following table provides the pin details and descriptions of the ISP header.
Pin Number | Pin on ISP Header | Pin Description of ISP Header | Pin on the ATA8510 RF Board(1) |
---|---|---|---|
J104-1 | MISO | Host-In Client-Out | PCINT3/MISO/PB3 |
J104-2 | VS_RF | 3.3V power supply | VS_RF |
J104-3 | SCK | Serial Clock | PCINT1/SCK/PB1 |
J104-4 | MOSI | Host-Out Client-In | PCINT2/MOSI/PB2 |
J104-5 | NRES | Reset | NRESET/PCINT8/debugWIRE/PC0 |
J104-6 | GND | Ground | GND |
Note:
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