65.6.16 Asynchronous Partial Wake-Up

This operating mode is a means of data pre-processing that qualifies an incoming event, thus allowing the ADC to decide whether or not to wake up the system. Asynchronous partial wake-up is mainly used when the system is in ULP1 mode (refer to the section "Power Management Controller (PMC)" for further details). It can also be enabled when the system is fully running.

Once the Asynchronous partial wake-up mode is enabled, no access must be performed in the ADC before a wake-up is performed by the ADC.

When the Asynchronous partial wake-up mode is enabled for the ADC (refer to the Power Management Controller (PMC) section), the PMC decodes a clock request from the ADC. The clock request is generated as soon as a trigger event occurs. Only a trigger from RTC or ADTRG pin can be used in partial wake-up mode. The selection between RTC or ADTRG pin is performed through the ADC_MR.TRGSEL field.

If the system is in ULP1 mode (processor and peripheral clocks switched off), the PMC restarts the fast RC oscillator and provides the clock only to the ADC.

To perform a conversion at regular intervals with RTC trigger, the RTC must be configured with the following settings: RTC_MR.OUT0=7 and RTC_MR.THIGH=7. The period of the trigger can be defined in RTC_MR.TPERIOD.

To trigger a conversion using the ADTRG pin, the minimum high level duration of the ADTRG signal must be greater than 2 clock periods of the fast RC oscillator. The maximum duration of the high level must be limited to the amount of start-up and conversion time.

As soon as the clock is provided by the PMC, the ADC processes the conversions and compares the converted values with the ADC_CWR.LOWTHRES and ADC_CWR.HIGHTHRES field values.

The ADC instructs the PMC to disable the clock if the converted value does not meet the conditions defined by the ADC_CWR.LOWTHRES and ADC_CWR.HIGHTHRES field values.

If the converted value meets the conditions, the ADC instructs the PMC to exit the full system from ULP1 mode.

If the processor and peripherals are running, the ADC can be configured in Asynchronous partial wake-up mode by enabling PMC_SLPWK_ER (refer to the Power Management Controller (PMC) section). When a trigger event occurs, the ADC requests the clock from the PMC and the comparison is performed. If there is a comparison match, the ADC continues to request the clock. If there is no match, the clock is switched off for the ADC only, until a new trigger event is detected.

It is recommended to write a ‘1’ to ADC_MR.SLEEP to reduce the power consumption of the ADC analog part when the system is waiting for a trigger event.