64.6.7 SECUMOD JTAG Protection Control Register

Note: Reset values are all 0 when fuse DEFDBG is programmed.
Name: SECUMOD_JTAGCR
Offset: 0x0068
Reset: 0x00000008
Property: Read/Write

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
    WZOCA5_DEBUG_MODE[2:0]FNTRST 
Access R/WR/WR/WR/WR/W 
Reset 01000 

Bit 4 – WZO Write ZERO

Must be written with 0.

Bits 3:1 – CA5_DEBUG_MODE[2:0] Invasive/Non-Invasive Secure/Non-Secure Debug Permissions

This field is used to set different debug permission levels. For instance, it can be used to prevent debug on secure parts of the code. The table below shows the effect of the field value on the Cortex-A5 pins (SPIDEN, DBGEN, SPNIDEN and NIDEN).

CA5_DEBUG_MODE Value Debug Permissions SPIDEN DBGEN SPNIDEN NIDEN
b000 No Debug 0 0 0 0
b001 Non-Invasive, Non-Secure 0 0 0 1
b010 Full Non-Secure (Invasive and Non-Invasive) 0 1 0 0
b011 Full Non-Secure + Non-Invasive Secure 0 1 1 1
b100 Full Debug allowed 1 1 1 1

Bit 0 – FNTRST Force NTRST

ValueDescription
0 The Arm processor’s TAP controller access and boundary JTAG are not blocked by the Security Module.
1 nDBGRESET of the processor’s TAP controller and boundary JTAG reset are held low, preventing the processor to switch to debug state and boundary JTAG to work.