The content of the document has been restructured from: - ATtiny1614 Silicon Errata and Data Sheet Clarification
- ATtiny1616/3216
Silicon Errata and Data Sheet Clarification
- ATtiny1617/3217
Silicon Errata and Data Sheet Clarification
to: - ATtiny1614/1616/1617 Silicon Errata and Data Sheet
Clarification
- ATtiny3216/3217 Silicon Errata and Data Sheet
Clarification (this document)
Refer to Appendix - Obsolete Revision
History for further details.The following
items are referring to changes between the latest revisions of the
obsolete documents and this document: - Added erratas:
- Device:
Writing the OSCLOCK Fuse in FUSE.OSCCFG to '1'
Prevents Automatic Loading of Calibration
Values
- USART:
Open-Drain Mode Does Not Work When TXD is
Configured as Output
- Removed erratas
not applicable for ATtiny3216/3217
- AC
- AC Interrupt Flag Not Set Unless Interrupt is
Enabled
- False Triggers May Occur Under Certain
Conditions
- False Triggering When Sweeping Negative Input
of the AC When the Low-Power Mode is
Disabled
- ADC
- SAMPDLY and ASDV Does Not Work Together With
SAMPLEN
- ADC Interrupt Flags Cleared When Reading
RESH
- Changing ADC Control Bits During Free-Running
Mode not Working
- Changing ADC Control Bits During Free-Running
Mode not Working
- ADC Wake-Up with WCOMP
- TCB
- The TCB Interrupt Flag is Cleared When Reading
CCMPH
- TCB Input Capture Frequency and Pulse-Width
Measurement Mode Not Working with Prescaled
Clock
- TCD
- TCD Event Output Lines May Give False
Events
- TCD Auto-Update Not Working
- TWI
- TIMEOUT Bits in the TWI.MCTRLB Register are
Not Accessible
- TWI Master Mode Wrongly Detects the Start Bit
as a Stop Bit
- TWI Smart Mode Gives Extra Clock
Pulse
- The TWI Master Enable Quick Command is Not
Accessible
- USART
- Full Range Duty Cycle Not Supported When
Validating LIN Sync Field
- Removed data
sheet clarifications, as the corresponding data sheet has been
updated with correct information
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