20.11.2 TxGCON
| Name: | TxGCON |
| Address: | 0x20F |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GE | GPOL | GTM | GSPM | GGO/DONE | GVAL | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R | |||
| Reset | 0 | 0 | 0 | 0 | 0 | x |
Bit 7 – GE Timer Gate Enable
Bit 6 – GPOL Timer Gate Polarity
| Reset States: |
|
| Value | Description |
|---|---|
1 |
Timer gate is active-high (Timer counts when gate is high) |
0 |
Timer gate is active-low (Timer counts when gate is low) |
Bit 5 – GTM Timer Gate Toggle Mode
Timer Gate Flip-Flop Toggles on every rising edge when Toggle mode is enabled.
| Reset States: |
|
| Value | Description |
|---|---|
1 |
Timer Gate Toggle mode is enabled |
0 |
Timer Gate Toggle mode is disabled and Toggle flip-flop is cleared |
Bit 4 – GSPM Timer Gate Single Pulse Mode
| Reset States: |
|
| Value | Description |
|---|---|
1 |
Timer Gate Single Pulse mode is enabled and is controlling Timer gate |
0 |
Timer Gate Single Pulse mode is disabled |
Bit 3 – GGO/DONE Timer Gate Single Pulse Acquisition Status
This bit is automatically cleared when TxGSPM is cleared.
| Reset States: |
|
| Value | Description |
|---|---|
1 |
Timer Gate Single Pulse Acquisition is ready, waiting for an edge |
0 |
Timer Gate Single Pulse Acquisition has completed or has not been started |
Bit 2 – GVAL Timer Gate Current State
Indicates the current state of the timer gate that could be provided to TMRxH:TMRxL
Unaffected by Timer Gate Enable (GE bit)