The Master generates a Start condition by setting the SEN
bit.
SSPxIF is set by hardware on completion of the Start.
SSPxIF is cleared by software.
The MSSP module will wait the required start time before any
other operation takes place.
Software loads the SSPxBUF with
the slave address and the R/W bit. In Master Transmit mode, the
R/W value is zero.
Address is shifted out the SDA pin until all eight bits are
transmitted. Transmission begins as soon as SSPxBUF is written to.
The MSSP module shifts in the ACK value from the slave device and writes its into the ACKSTAT bit.
The MSSP module generates an interrupt at the end of the ninth
clock cycle by setting the SSPxIF bit.
Software loads the SSPxBUF with eight bits of data.
Data is shifted out the SDA pin until all eight bits are
transmitted.
The MSSP module shifts in the ACK bit from the slave device and writes its value into the ACKSTAT
bit.
Steps 8-11 are repeated for all transmitted data bytes.
The user generates a Stop or Restart condition by setting the
PEN or RSEN bits, respectively. An Interrupt is generated once the
Stop/Restart condition is complete.
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