36.2.1 Extended Instruction Syntax

Most of the extended instructions use indexed arguments, using one of the File Select Registers and some offset to specify a source or destination register. When an argument for an instruction serves as part of indexed addressing, it is enclosed in square brackets (“[ ]”). This is done to indicate that the argument is used as an index or offset. MPASM™ Assembler will flag an error if it determines that an index or offset value is not bracketed.

When the extended instruction set is enabled, brackets are also used to indicate index arguments in byte-oriented and bit-oriented instructions. This is in addition to other changes in their syntax. For more details, see Extended Instruction Syntax with Standard PIC18 Commands.

Important: In the past, square brackets have been used to denote optional arguments in the PIC18 and earlier instruction sets. In this text and going forward, optional arguments are denoted by braces (“{ }”).

Table 36-3. Extensions to the PIC18 Instruction Set
Mnemonic, Operands		Description	Cycles	16-Bit Instruction Word				Status Affected
Mnemonic, Operands		Description	Cycles	MSb			LSb	Status Affected
ADDFSR	f, k	Add literal to FSR	1	`1110`	`1000`	`ffkk`	`kkkk`	None
ADDULNK	k	Add literal to FSR2 and return	2	`1110`	`1000`	`11kk`	`kkkk`	None
CALLW		Call subroutine using WREG	2	`0000`	`0000`	`0001`	`0100`	None
MOVSF	z_s, f_d	Move z_s(source) to 1st word	2	`1110`	`1011`	`0zzz`	`zzzz`	None
MOVSF	z_s, f_d	f_d (destination) 2nd word	2	`1111`	`ffff`	`ffff`	`ffff`	None
MOVSS	z_s, z_d	Move z_s (source) to 1st word	2	`1110`	`1011`	`1zzz`	`zzzz`	None
MOVSS	z_s, z_d	z_d (destination) 2nd word	2	`1111`	`xxxx`	`xzzz`	`zzzz`	None
PUSHL	k	Store literal at FSR2,   decrement FSR2	1	`1110`	`1010`	`kkkk`	`kkkk`	None
SUBFSR	f, k	Subtract literal from FSR	1	`1110`	`1001`	`ffkk`	`kkkk`	None
SUBULNK	k	Subtract literal from FSR2 and  return	2	`1110`	`1001`	`11kk`	`kkkk`	None

PIC18(L)F26/45/46K40

36.2.1 Extended Instruction Syntax