32.1.2 Channel Selection

The ADPCH register determines which channel is connected to the Sample-and-Hold circuit.

There are several channel selections available as shown in the following selection table:

Table 32-1. ADC Positive Input Channel Selections
ADPCHADC Positive Channel Input
111111Fixed Voltage Reference (FVR)(2)
111110DAC1 output(1)
111101Temperature Indicator(3)
111100AVSS (Analog Ground)
100011-111011Reserved. No channel connected.
100010RE2/ANE2(1)
100001RE1/ANE1(1)
100000RE0/ANE0(1)
011111RD7/AND7(1)
011110RD6/AND6(1)
011101RD5/AND5(1)
011100RD4/AND4(1)
011011RD3/AND3(1)
011010RD2/AND2(1)
011001RD1/AND1(1)
011000RD0/AND0(1)
010111RC7/ANC7
010110RC6/ANC6
010101RC5/ ANC5
010100RC4/ ANC4
010011RC3/ANC3
010010RC2/ANC2
010001RC1/ ANC1
010000RC0/ANC0
001111RB7/ANB7
001110RB6/ANB6
001101RB5/ANB5
001100RB4/ ANB4
001011RB3/ANB3
001010RB2/ ANB2
001001RB1/ ANB1
001000RB0/ANB0
000111RA7/ANA7
000110RA6/ANA6
000101RA5/ANA5
000100RA4/ ANA4
000011RA3/ ANA3
000010RA2/ ANA2
000001RA1/ ANA1
000000RA0/ANA0
Note:
  1. 40/44-pin devices only.

When changing channels, a delay is required before starting the next conversion.

Refer to the “ADC Operation” section for more information.

Important: It is recommended to discharge the Sample-and-Hold capacitor when switching between ADC channels by starting a conversion on a channel connected to VSS and terminating the conversion after the acquisition time has elapsed. If the ADC does not have a dedicated VSS input channel, the VSS selection (DAC1R[4:0] = b'00000') through the DAC output channel can be used. If the DAC is in use, a free input channel can be connected to VSS, and can be used in place of the DAC.