11.8.5 STATUS
Note:
- For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand.
- For Rotate (
RRCF
,RLCF
) instructions, this bit is loaded with either the high or low-order bit of the Source register.
Name: | STATUS |
Offset: | 0xFD8 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TO | PD | N | OV | Z | DC | C | |||
Access | R | R | R/W | R/W | R/W | R/W | R/W | ||
Reset | 1 | 1 | 0 | 0 | 0 | 0 | 0 |
Bit 6 – TO Time-Out bit
Reset States: |
|
Value | Description |
---|---|
1 | Set at
power-up or by execution of CLRWDT or SLEEP
instruction |
0 | A WDT time-out occurred |
Bit 5 – PD Power-Down bit
Reset States: |
|
Value | Description |
---|---|
1 | Set at
power-up or by execution of CLRWDT
instruction |
0 | Cleared by
execution of the SLEEP instruction |
Bit 4 – N Negative bit
1
).Reset States: |
|
Value | Description |
---|---|
1 | The result is negative |
0 | The result is positive |
Bit 3 – OV Overflow bit
Reset States: |
|
Value | Description |
---|---|
1 | Overflow occurred for current signed arithmetic operation |
0 | No overflow occurred |
Bit 2 – Z Zero bit
Reset States: |
|
Value | Description |
---|---|
1 | The result of an arithmetic or logic operation is zero |
0 | The result of an arithmetic or logic operation is not zero |
Bit 1 – DC Digit Carry/Borrow bit
ADDWF
, ADDLW
, SUBLW
,
SUBWF
instructions(1)Reset States: |
|
Value | Description |
---|---|
1 | A carry-out from the 4th low-order bit of the result occurred |
0 | No carry-out from the 4th low-order bit of the result |
Bit 0 – C Carry/Borrow bit
ADDWF
,
ADDLW
, SUBLW
, SUBWF
instructions(1,2)Reset States: |
|
Value | Description |
---|---|
1 | A carry-out from the Most Significant bit of the result occurred |
0 | No carry-out from the Most Significant bit of the result occurred |