Introduction
(Ask a Question)RT PolarFire® FPGAs offer a variety of programming options to diverse end-user applications. The following components of RT PolarFire devices are programmable:
- FPGA fabric
- Secure non-volatile memory (sNVM)
- User security settings (keys, passcodes, and locks)
The device can be programmed using the on-chip system controller through its dedicated JTAG or SPI interface. Based on the interface used, the following three programming modes are supported:
- JTAG
- SPI master
- SPI slave
If System Controller Suspend Mode is enabled, SPI master programming modes such as IAP and system services initiated Auto-update features are not available to program the device. Only Power-up or DEVRST_N initiated Auto-update is available.
In JTAG and SPI slave programming modes, the device can be programmed either using an external master such as a microprocessor or a Microchip FlashPro programmer v5 or later. The external master fetches the programming data (bitstream) from an external memory to program the device.
In SPI master programming mode, the system controller acts as the master and fetches the bitstream from an external SPI flash memory to program the device. This mode supports two programming features—Auto Update and IAP. In auto update, the device reprograms itself on power-up, and in IAP, the device is programmed when the user application initiates programming.
The following block diagram shows the device programming modes and the associated interfaces.
