1 Bitstream Generation

The Libero® SoC design suite generates the programming bitstream required for various programming modes. Depending on the requirement, the programming bitstream may contain one or more of the following components:

  • FPGA fabric logic
  • sNVM data
  • User security settings

The following table lists the programming interfaces used in various programming modes and the associated bitstream formats.

Table 1-1. RT PolarFire FPGA Programming Interfaces and Bitstream Formats
Programming ModeInterfaceMasterBitstream Format
JTAG programmingSystem controller’s dedicated JTAGFlashPro programmerSTP
JTAG programmingSystem controller’s dedicated JTAGExternal microprocessorDAT
JTAG programmingSystem controller’s dedicated JTAGChipPro solution using FlashPro6STAPL
SPI slave programmingSystem controller’s dedicated SPIFlashPro programmerDAT
SPI slave programmingSystem controller’s dedicated SPIExternal microprocessorDAT
SPI master programmingSystem controller’s dedicated SPISystem controllerSPI