4.2 Interrupts in Metrology Stage

The following figure illustrates the metrology interrupts flowchart.

Figure 4-2. Metrology Interrupts Flowchart

The application code can disable any IPC interrupts it does not need.

When an IPC IRQ interrupt arrives, the application code first determines which kind of interrupt occurred and then it checks related Metrology Status Registers and executes its specific handler.

The IPC interrupt is defined as the following:

3130292827262524
—————PULSE2_IRQPULSE1_IRQPULSE0_IRQ
2322212019181716
———INIT_IRQ———STATUS_IRQ
15141312111098
———RZC_IRQ————
76543210
CREEP_IRQ—HALF_CYCLE_IRQFULL_CYCLE_IRQ———INTEGRATION_IRQ
The sef lib provided by Microchip can be used to set this register:
  • PULSE0_IRQ, PULSE1_IRQ, PULSE2_IRQ: Pulse Interrupts

These interrupts are generated immediately after the pulse has occurred. The typical delay is less than 1 μs. However, if the metrology code is attending a high-priority interrupt, such as the one triggered when the AFE has a new sample ready to be read, the delay could be higher.

  • INIT_IRQ: Initialization Requirement Interrupt
This interrupt is used to inform the application code to initialize the metrology control registers and the ACC_T0, ACC_T1 and ACC_T2 if necessary.
  • STATUS_IRQ: STATUS Update Interrupt

This interrupt is used to inform the application code of change(s) in priority status bit(s). This feature is not implemented.

  • RZC_IRQ: Raw Zero Crossing Interrupt
This interrupt is generated on zero-crossings using the unfiltered raw 16 kHz data stream of the selected direction and selected voltage channel.
  • CREEP_IRQ: CREEP Detection Interrupt

This interrupt is used to inform the application code of detection of a creep condition. This feature is not implemented.

  • HALF_CYCLE_IRQ: Half Line Cycle Interrupt
This interrupt is generated every half line cycle. It means that swell and sag flags were updated. Unlike the RZC_IRQ, the HALF_CYCLE_IRQ uses the 4 kHz narrowband filtered voltage channels and exhibit a deterministic but frequency-dependent phase delay.
  • FULL_CYCLE_IRQ: Line Cycle Interrupt
This interrupt is generated every full line cycle. It means that the Per-Cycle Accumulated Output Quantities, frequency and accumulated energy associated with pulse (including the ACC_T0, ACC_T1, ACC_T2 accumulators) were updated. Unlike the RZC_IRQ, the FULL_CYCLE_IRQ uses the 4 kHz narrowband filtered voltage channels and exhibits a deterministic but frequency-dependent phase delay.
  • INTEGRATION_IRQ: Integration Period Interrupt

This interrupt is used to inform the application code that the whole integration period finishes. It means that all accumulated quantities and status N were updated.