3.2.3 Target Powered
In the following descriptions, only three lines are active and relevant to core debugger operation: pins 1 (VPP/MCLR), 5 (PGC), and 4 (PGD). Pins 2 (VDD) and 3 (VSS) are shown in Figure 3-3 for completeness.
The recommended source of power is external and derived from the target application (see figure below). In this configuration, target VDD is sensed by the debugger to allow level translation for the target low voltage operation. If the debugger does not sense voltage on its VDD line (pin 2 of the interface connector), it will not operate.
