3.2.5 GPIOs

The following sections depict all the signals connected to the SAM9X75D2G MPU ports.

The following figure shows the processor PIOs connections.

Figure 3-13. Processor PIOs PA and PB

Figure 3-14. Processor PIOs PC and PD

Some of the ports are multiplexed to accommodate more devices on the evaluation kit and to showcase all the functions the SAM9X75D2G MPU can address off a single PIO wire.

Most of the lines that share multiple functions are split through passive resistors. In order to access them, the user can opt for moving the selection resistors using the text searchable assembly drawing from the appendix of this user guide. In some cases, the user can use only one of the functions at a time, or can develop a composite driver enabling the use of multiple functions at the same time.

The following figure shows an example of the processor PIO muxing.

Figure 3-15. GPIO Distribution