3.2.6 Standard Serial Communication Interfaces Distribution

SAM9X75-Curiosity features several devices and interfaces that use UART, SPI and TWI interfaces. These are multiplexed in order to minimize the number of pins used and maximize the number of addressable devices.

The following table shows the PIOs assignment and signal description.

Table 3-3. Processor PIOs Pin Assignment and Signal Description
Pad Power Rail Function I/O Type
PA0 VDDIOP0 SDMMC0_DAT0 Data 0 bidirectional line going to the microSD card connector (J14)
PA1 VDDIOP0 SDMMC0_CMD Command (CMD) bidirectional line going to the microSD card connector (J14)
PA2 VDDIOP0 SDMMC0_CK Clock (CLK) output line going to the microSD card connector (J14)
PA3 VDDIOP0 SDMMC0_DAT1 Data 1 bidirectional line going to the microSD card connector (J14)
PA4 VDDIOP0 SDMMC0_DAT2 Data 2 bidirectional line going to the microSD card connector (J14)
PA5 VDDIOP0 SDMMC0_DAT3 Data 3 bidirectional line going to the microSD card connector (J14)
PA6 VDDIOP0 SDMMC1_DAT1 Data 1 bidirectional line going to the M.2 KEYE connector (J20)
PA7 VDDIOP0 SDMMC1_DAT2 Data 2 bidirectional line going to the M.2 KEYE connector (J20)
PA8 VDDIOP0 SDMMC1_DAT3 Data 3 bidirectional line going to the M.2 KEYE connector (J20)
PA9 VDDIOP0 SDMMC1_DAT0 Data 0 bidirectional line going to the M.2 KEYE connector (J20)
SPI Host Input Client Output (MISO) input line going to the M.2 KEYE connector (J20)
PA10 VDDIOP0 SDMMC1_CMD Command (CMD) bidirectional line going to the M.2 KEYE connector (J20)
FLEXCOM4_IO0_SPI_MOSI SPI Host Output Client Input (MOSI) output line going to the M.2 KEYE connector (J20)
PA11 VDDIOP0 SDMMC1_CK Clock (CLK) output line going to the M.2 KEYE connector (J20)
FLEXCOM4_IO2_SPI_CLK SPI Clock (SCK) output line going to the M.2 KEYE connector (J20)
PA12 VDDIOP0 PMIC_INT PMIC Interrupt line for other I2C devices
PA13 VDDIOP0 SDMMC1_CD Card Detect input line going to the M.2 KEYE connector (J20)
FLEXCOM4_IO4_SPI_CS SPI Chip Select (CS) output line going to the M.2 KEYE connector (J20)
PA14 VDDIOP0 FLEXCOM5_IO3_CTS UART Clear to Send (CTS) input line going to the M.2 KEYE connector (J20)
PA15 VDDIOP0 FLEXCOM5_IO1_RXD UART Receive (RXD) input line going to the M.2 KEYE connector (J20)
RPi_GPIO15_MPU32_RXD UART Receive (RX) input line going to the external 40-pin connector (J27)
PA16 VDDIOP0 FLEXCOM5_IO0_TXD UART Transmit (TXD) output line going to the M.2 KEYE connector (J20)
RPi_GPIO14_MPU32_TXD UART Transmit (TX) output line going to the external 40-pin connector (J27)
PA17 VDDIOP0 MBUS_1_NRST Reset signal going to the mikroBUS connector (J25)
PA18 VDDIOP0 CLASSD_L0 Class D controller Left Output 0 to Class D connector (J36)
PA19 VDDIOP0 CLASSD_L1 Class D controller Left Output 1 to Class D connector (J36)
PA20 VDDIOP0 MXT_IRQ LCD Interrupt line for other I2C devices input signal going to Video LVDS connector (J28)
PA21 VDDIOP0 RPi_GPIO23 GPIO going to the external 40-pin connector (J27)
M.2_NRST Reset line output going to M.2 KEYE connector (J20)
PA22 VDDIOP0 RPi_GPIO24 GPIO going to the external 40-pin connector (J27)
PA23 VDDIOP0 SDMMC0_CD Card Detect input line going to the microSD card connector (J14)
PA24 VDDIOP0 M.2_I2C_DATA TWI Data (TWD) bidirectional line shared between the M.2 KEYE connector (J20), PMIC, Camera MIPI connector (J29) and Video LVDS connector (J28)
PMIC_ I2C_DATA
CAM_I2C_DATA
LCD_I2C_DATA
PA25 VDDANA M.2_I2C_CLK TWI Clock (TWCK) output line shared between the M.2 KEYE connector (J20), PMIC, Camera MIPI connector (J29) and Video LVDS connector (J28)
PMIC_ I2C_ CLK
CAM_I2C_ CLK
LCD_I2C_ CLK
PA26 VDDANA DBGU_RX Debug UART Receive (DRX) input line going to Debug connector (J35)
PA27 VDDANA DBGU_TX Debug UART Transmit (DTX) output line going to Debug connector (J35)
PA28 VDDANA MBUS_1_TX UART Transmit (TX) output line going to the mikroBUS connector (J25)
PA29 VDDANA MBUS_1_RX UART Receive (RX) input line going to the mikroBUS connector (J25)
PA30 VDDANA FLEXCOM5_IO4_RTS UART Request to Send (RTS) output line going to the M.2 KEYE connector (J20)
PA31 VDDANA MBUS_1_AN Analog input from the mikroBUS connector (J25)
PB0 VDDIOP2 RGMII_RXD2/GMII_RXD2 MII Ethernet Receive Data 2 signal going to SODIMM connector (J17)
PB1 VDDIOP2 RGMII_RXD3/GMII_RXD3 MII Ethernet Receive Data 3 signal going to SODIMM connector (J17)
PB2 VDDIOP2 GIGABIT_ETH_125CK Gigabit Ethernet 125CK signal going to SODIMM connector (J17)
PB3 VDDIOP2 RGMII_RXCTL/GMII_RXDV MII Ethernet Receive Data Valid signal going to SODIMM connector (J17)
PB4 VDDIOP2 RGMII_TXD2/GMII_TXD2 MII Ethernet Transmit Data 2 signal going to SODIMM connector (J17)
PB5 VDDIOP2 RGMII_TXD3/GMII_TXD3 MII Ethernet Transmit Data 3 signal going to SODIMM connector (J17)
PB6 VDDIOP2 RGMII_TXC-TXCK/GMII_TXCLK MII Ethernet Transmit Clock signal going to SODIMM connector (J17)
PB7 VDDIOP2 RGMII_TXCTL/GMII_TXEN MII Ethernet Transmit Enable signal going to SODIMM connector (J17)
PB8 VDDIOP2 RGMII_RXC-RXCK/GMII_RXCLK MII Ethernet Receive Clock signal going to SODIMM connector (J17)
PB9 VDDIOP2 GIGABIT_ETH_MDIO MII Ethernet Management Data I/O signal going to SODIMM connector (J17)
PB10 VDDIOP2 GIGABIT_ETH_MDC MII Ethernet Management Data Clock signal going to SODIMM connector (J17)
PB11 VDDIOP2 RGMII_RXD0/GMII_RXD0 MII Ethernet Receive Data 0 signal going to SODIMM connector (J17)
PB12 VDDIOP2 RGMII_RXD1/GMII_RXD1 MII Ethernet Receive Data 1 signal going to SODIMM connector (J17)
PB13 VDDIOP2 RGMII_TXD0/GMII_TXD0 MII Ethernet Transmit Data 0 signal going to SODIMM connector (J17)
PB14 VDDIOP2 RGMII_TXD1/GMII_TXD1 MII Ethernet Transmit Data 1 signal going to SODIMM connector (J17)
PB15 VDDQSPI RPi_GPIO19_I²S_WS I2S Word Select (WS) signal going to the external 40-pin connector (J27)
PB16 VDDQSPI RPi_GPIO20_I²S_DIN I2S Data IN (DIN) signal going to the external 40-pin connector (J27)
PB17 VDDQSPI RPi_GPIO21_I²S_DOUT I2S Data OUT (DOUT) signal going to the external 40-pin connector (J27)
PB18 VDDQSPI MBUS_1_INT Interrupt line input shared between the mikroBUS 1 connector (J25), PAC1934 and M.2 KEYE connector (J20)
PAC1934_INT
M.2_INT
PB19 VDDQSPI QSPI_SCK QSPI Clock signal going to SST26VF064BEUIT-104I/MF
PB20 VDDQSPI QSPI_CS QSPI Chip Select signal going to SST26VF064BEUIT-104I/MF
PB21 VDDQSPI QSPI_IO0 QSPI Data 0 signal going to SST26VF064BEUIT-104I/MF
PB22 VDDQSPI QSPI_IO1 QSPI Data 1 signal going to SST26VF064BEUIT-104I/MF
PB23 VDDQSPI QSPI_IO2 QSPI Data 2 signal going to SST26VF064BEUIT-104I/MF
PB24 VDDQSPI QSPI_IO3 QSPI Data 3 signal going to SST26VF064BEUIT-104I/MF
PB25 VDDQSPI RPi_GPIO4_I²S_MCK/GPCLK0 I2S Host Clock (MCK) signal going to the external 40-pin connector (J27)
PB26 VDDQSPI RPi_GPIO18_I²S_BCLK I2S Clock (CK) signal going to the external 40-pin connector (J27)
PC0 VDDIOP1 PAC_I2C_DATA TWI Data (TWD) bidirectional line shared between the PAC1934, SODIMM connector (J15), mikroBUS connector (J22) and external 40-pin connector (J27)
GIGABIT_ETH_ I2C_DATA
MBUS_1_I2C_DATA
RPi_GPIO2_I2C_SDA
PC1 VDDIOP1 PAC_I2C_CLK TWI Clock (TWCK) output line shared between the PAC1934, SODIMM connector (J15), mikroBUS connector (J22) and external 40-pin connector (J27)
GIGABIT_ETH_ I2C_ CLK
MBUS_1_I2C_ CLK
RPi_GPIO3_I2C_SCL
PC2 VDDLVDS LCD_LVDS_D0_N LVDS Data 0 N signal going to Video LVDS connector (J28)
PC3 VDDLVDS LCD_LVDS_D0_P LVDS Data 0 P signal going to Video LVDS connector (J28)
PC4 VDDLVDS LCD_LVDS_D1_N LVDS Data 1 N signal going to Video LVDS connector (J28)
PC5 VDDLVDS LCD_LVDS_D1_P LVDS Data 1 P signal going to Video LVDS connector (J28)
PC6 VDDLVDS LCD_LVDS_D2_N LVDS Data 2 N signal going to Video LVDS connector (J28)
PC7 VDDLVDS LCD_LVDS_D2_P LVDS Data 2 P signal going to Video LVDS connector (J28)
PC8 VDDIOP1 USBA_VBUS_DETECT USBA VBUS detect input
PC9 VDDIOP1 USER_BUTTON GPIO used as input to probe the changes of the user button
PC10 VDDLVDS LCD_LVDS_CK_N LVDS Clock N signal going to Video LVDS connector (J28)
PC11 VDDLVDS LCD_LVDS_CK_P LVDS Clock P signal going to Video LVDS connector (J28)
PC12 VDDLVDS LCD_LVDS_D3_N LVDS Data 3 N signal going to Video LVDS connector (J26)
PC13 VDDLVDS LCD_LVDS_D3_P LVDS Data 3 P signal going to Video LVDS connector (J28)
PC14 VDDIOP1 RGB_LED_RED LD1 red LED
PC15 VDDIOP1 MIPI_CSI_GPIO1 GPIO going to the Camera MIPI connector (J29)
PC16 VDDIOP1 WIRELESS_WAKE GPIO used as wireless wake up going to the M.2 KEYE connector (J20)
PC17 VDDIOP1 IRQN GPIO used as IRQ going to the M.2 KEYE connector (J20)
PC18 VDDIOP1 LCD_BACKLIGHT_PWM LCD PWM for Contrast Control output signal going to Video LVDS connector (J28)
PC19 VDDIOP1 MIPI_CSI_GPIO0 GPIO going to the Camera MIPI connector (J29)
PC20 VDDIOP1 RGB_LED_BLUE LD1 blue LED
RPi_GPIO13_PWM1 PWM1 signal output line going to the external 40-pin connector (J27)
PC21 VDDIOP1 RGB_LED_GREEN LD1 green LED
MBUS_1_PWM PWM signal output line going to the mikroBUS connector (J22)
PC22 VDDIOP1 MBUS_1_SPI_MOSI SPI Host Output Client Input (MOSI) output line shared between the mikroBUS connector (J22), the external 40-pin connector (J27) and the SODIMM connector (J17)
RPi_GPIO10_SPI_MOSI
GIGABIT_SPI_MOSI
PC23 VDDIOP1 MBUS_1_SPI _MISO SPI Host Input Client Output (MISO) input line shared between the mikroBUS connector (J22), the external 40-pin connector (J27) and the SODIMM connector (J17)
RPi_GPIO9_SPI_ MISO
GIGABIT_SPI_MISO
PC24 VDDIOP1 MBUS_1_SPI_NPCS SPI Chip Select (CS) output line for the mikroBUS connector (J22)
PC25 VDDIOP1 NRST_OUT Output signal used to reset all the devices on the board
RPi_GPIO8_SPI_ NPCS0/ GIGABIT_SPI_NPCS0 SPI Chip Select 0 (CS) output line for external 40-pin connector (J27) or the SODIMM connector (J17)
PC26 VDDIOP1 MBUS_1_SPI _SCK SPI Clock (SCK) output line shared between the mikroBUS connector (J22), the external 40-pin connector (J27) and the SODIMM connector (J17)
RPi_GPIO11_SPI _ SCK
GIGABIT_SPI_SCK
PC27 VDDIOP1 USBB_EN_5V Power Delivery Enable signal for USBB host interface
PC28 VDDIOP1 USBB_OVCUR USBB overcurrent flag input
PC29 VDDIOP1 USBC_OVCUR USBC overcurrent flag input
PC30 VDDIOP1 LCD_MODULE_ENABLE LCD Enable output signal going to Video LVDS connector (J28)
PC31 VDDIOP1 USBC_EN_5V Power Delivery Enable signal for USBC host interface
PD0 VDDNF NAND_RE NAND Flash Read Enable (RE) output signal going to MX30LF4G28ADXKI
PD1 VDDNF NAND_WE NAND Flash Write Enable (OE) output signal going to MX30LF4G28ADXKI
PD2 VDDNF NAND_ALE

NAND Flash Address Latch Enable (ALE) output signal going to

MX30LF4G28AD-XKI
PD3 VDDNF NAND_CLE

NAND Flash Command Latch Enable (CLE) output signal going to

MX30LF4G28AD-XKI
PD4 VDDNF NAND_CS NAND Flash Chip Select (CS) output signal going to MX30LF4G28AD-XKI
PD5 VDDNF GIGABIT_ETH_IRQ_N Gigabit Ethernet IRQ_N signal going to SODIMM connector (J17)
PD6 VDDNF NAND_D0 NAND Flash Data 0 (D0) bidirectional signal going to MX30LF4G28ADXKI
PD7 VDDNF NAND_D1 NAND Flash Data 1 (D1) bidirectional signal going to MX30LF4G28ADXKI
PD8 VDDNF NAND_D2 NAND Flash Data 2 (D2) bidirectional signal going to MX30LF4G28ADXKI
PD9 VDDNF NAND_D3 NAND Flash Data 3 (D3) bidirectional signal going to MX30LF4G28ADXKI
PD10 VDDNF NAND_D4 NAND Flash Data 4 (D4) bidirectional signal going to MX30LF4G28ADXKI
PD11 VDDNF NAND_D5 NAND Flash Data 5 (D5) bidirectional signal going to MX30LF4G28ADXKI
PD12 VDDNF NAND_D6 NAND Flash Data 6 (D6) bidirectional signal going to MX30LF4G28ADXKI
PD13 VDDNF NAND_D7 NAND Flash Data 7 (D7) bidirectional signal going to MX30LF4G28ADXKI
PD14 VDDNF NAND_RDY

NAND Flash Ready/Busy (R/B#) input signal coming from

MX30LF4G28AD-XKI