3 PolarFire and RT PolarFire FPGA Resets

After a device power-up, the PolarFire and RT PolarFire FPGA system controller manages the device initialization. The fabric flip-flops power up in an unknown state. The reset logic should be included in the design for proper functioning. A reset pulse is required to force the initial state of flip-flops to a known value. The following sections describe the PolarFire and RT PolarFire hard resets and user reset generation mechanism.