1.1 Key Architectural Advantages

The key architectural advantages are as follows:

• On-Demand Clocking for Dynamic Power Gating: In Standby mode, clocks are halted by default to conserve energy and are enabled only when requested by peripherals. SleepWalking-enabled peripherals request clocks only when a hardware trigger occurs, and upon task completion, the clocks are disabled immediately. This on-demand principle extends to power domains through Dynamic Power Gating on select device families, where domains can automatically transition between retention and active states based on event or DMA triggers.
• Autonomous Peripheral Operation: Select peripherals operate independently of the CPU, reducing unnecessary power-intensive transitions to Active mode and keeping the system in its low-power Standby state longer.
• Event-Driven Logic: Integration with the Event System (EVSYS) allows for complex, multi-peripheral workflows to occur entirely in the background. If no CPU intervention is required following a peripheral task, the system remains in Standby, ensuring the absolute minimum power consumption is maintained.