7 Read Sequence

Reading the AT25128B/AT25256B via the SO pin requires the following sequence. After the CS line is pulled low to select a device, the READ (03h) instruction is transmitted via the SI line followed by the 16‑bit address to be read. Refer to Table 7-1 for the AT25128B/AT25256B address bits.

Upon completion of the 16‑bit address, any data on the SI line will be ignored. The data (D7‑D0) at the specified address are then shifted out onto the SO line. If only one byte is to be read, the CS line should be driven high after the data comes out. The read sequence can be continued since the byte address is automatically incremented and data will continue to be shifted out. When the highest‑order address bit is reached, the address counter will roll over to the lowest‑order address bit, allowing the entire memory to be read in one continuous read cycle regardless of the starting address.